The basic architecture of the IA-32 family is described in Volume 1 of the IA-32 Intel Architecture Software Developer's Manual (available at intel.com). These notes just summarize a few items of interest, and thus in no way serve as a substitute for reading Intel's manuals.
There are several modes that the processor can execute in, including:
Application programmers only care about the following registers:

Application programmers can remain oblivious of the rest of the registers:
See the IA-32 SDM Volume 1, Chapter 5 for a nice overview of all of the processor instructions and Volumes 2A and 2B for complete information. For fun, here is a partial list of processor instructions, grouped into four major categories.
| Group | Examples |
|---|---|
| Integer Instructions | mov, cmovo, xchg, bswap, xadd, cmpxchg, push, pop, pusha, popa, in, out, cdq, movzx, add, sub, mul, imul, div, idiv, inc, dec, neg, cmp, and, or, xor, not, shl, shr, ror, rol, rcr, rcl, bt, bts, btr, btc, bsf, sete, setnz, test, jmp, jno, loop, call, ret, enter, leave, movs, stc, cmc, pushf, lds, les, lea, nop, ud2, cpuid |
| Floating Point Instructions | fld, fst, fst, fild, fist, fadd, faddp, fsub. fsubp, fmul, fmulp, fdiv, fdivp, fidiv, fabs, frdint, fcom, fsin, fcos, fsincos, fptan, fpatan, f2xm1, fyl2x, fld1, fldz, fldpi, fldln2, fincstp, fdecstp, finit |
| SIMD Instructions (MMX, SSE, SSE2 and SSE3) | movd, movq, packssdw, punpckhdq, punpckldq, paddd, paddsw, psubd, pmulhw, pmullw, pmaddwd, pcmpeqd, pand, pandn, psllw, pslld, psrad, emms; movaps, movlps, movhlps, movmskps, addps, addss, mulps, divps, rcpss, sqrtss, rsqrtps, minss, xorps, cmpss, comiss, unpcklps, cvtsi2ss, pavgb, pmaxub, pshufw, maskmovq, sfence; movhpd, movmskpd, mulsd, sqrtpd, andnpd, cmppd, shufpd, cvtsd2ss, cvtdq2pd, pmuludq, clflush, movnti |
| System Instructions | lgdt, sgdt, lldt, sldt, ltr, str, lidt, sidt, lmsw, smsw, clts, arpl, lar, lsl, verr, verw, invd, wbinvd, invlpg, hlt, rsm, rdmsr, wrmsr, rdpmc, rdtsc |
In protected mode, applications can choose a flat or segmented memory model (see the SDM Volume 1, Chapter 3 for details); in real mode only a 16-bit segmented model is available. Most programmers will only use protected mode and a flat-memory model, so that's all we'll discuss here.
A memory reference has four parts and is often written as
[SELECTOR : BASE + INDEX * SCALE + OFFSET]
The selector is one of the six segment registers; the base is one of the eight general purpose registers; the index is any of the general purpose registers except ESP; the scale is 1, 2, 4, or 8; and the offset is any 32-bit number. (Example: [fs:ecx+esi*8+93221].) The minimal reference consists of only a base register or only an offset; a scale can only appear if there is an index present.
Application programs will never be concerned about the actual contents of the segment registers. Unless you are using DOS, you will probably never even refer to them. System programmers, on the other hand, do care about them.
The data types are
| Type name | Number of bits | Bit indices |
|---|---|---|
| Byte | 8 | 7..0 |
| Word | 16 | 15..0 |
| Doubleword | 32 | 32..0 |
| Quadword | 64 | 63..0 |
| Doublequadword | 128 | 127..0 |
The IA-32 is little endian, meaning the least significant bytes come first in memory. For example:
0 12
1 31 byte @ 9 = 1F
2 CB word @ B = FE06
3 74 word @ 6 = 230B
4 67 word @ 1 = CB31
5 45 dword @ A = 7AFE0636
6 0B qword @ 6 = 7AFE06361FA4230B
7 23 word @ 2 = 74CB
8 A4 qword @ 3 = 361FA4230B456774
9 1F dword @ 9 = FE06361F
A 36
B 06
C FE
D 7A
E 12
Many instructions cause the flags register to be updated. For example if you execute an add instruction and the sum is too big to fit into the destination register, the Overflow flag is set.
3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+---------------------------------------------------------------+
| | | | | | | | | | |I|V|V|A|V|R| |N| I |O|D|I|T|S|Z| |A| |P| |C|
| | | | | | | | | | |D|I|I|C|M|F| |T| P |F|F|F|F|F|F| |F| |F| |F|
| | | | | | | | | | | |P|F| | | | | | L | | | | | | | | | | | | |
+---------------------------------------------------------------+
The flags are described in Section 3.4.3 of Volume 1 of the SDM. To determine how each instruction affects the flags, see Appendix A of Volume 1 of the SDM.
Sometimes while executing an instruction an exception occurs. There are three types of exceptions.
When exceptions occur, the processor will start executing code in an exception handler associated with that exception. The predefined exceptions are:
| GENERAL EXCEPTIONS | ||||
|---|---|---|---|---|
| 0 | #DE | Divide Error | fault | DIV or IDIV instruction |
| 1 | #DB | Debug | fault trap |
... |
| 3 | #BP | Breakpoint | trap | INT 3 instruction |
| 4 | #OF | Overflow | trap | INTO instruction executed when overflow flag in EFLAGS is set |
| 5 | #BR | Bound Range Exceeded | fault | BOUND instruction |
| 6 | #UD | Undefined Opcode | fault | UD2 instruction, or attempt to execute an opcode that doesn't correspond to any instruction |
| 7 | #NM | Device Not Available | fault | FPU instruction or WAIT instruction on a processor without an FPU that is not linked to a FPU coprocessor |
| 8 | #DF | Double Fault | abort | Exception occurred during an exception handler |
| 10 | #TS | Invalid TSS | fault | Task switch or implicit TSS access |
| 11 | #NP | Not Present | fault | Loading segment registers or accessing system segments |
| 12 | #SS | Stack Segment Fault | fault | Stack operations and SS register loads |
| 13 | #GP | General Protection Fault | fault | Any memory reference and other protection checks |
| 14 | #PF | Page Fault | fault | Any memory reference |
| 16 | #MF | FPU Math Fault | fault | Any FPU instruction #IS - FPU stack overflow #IA - Invalid arithmetic operation #Z - Divide by zero #D - Source operand is a denormal number #O - Overflow in result #U - Underflow in result #P - Inexact result |
| 17 | #AC | Alignment Check | fault | Any data reference in memory |
| 18 | #MC | Machine Fault | abort | Internal Error or bus error |
| 19 | #XF | SIMD Math Fault | fault | Any SIMD instruction #I - Invalid arithmetic operation or source operand #Z - Divide by zero #D - Source operand is a denormal number #O - Overflow in result #U - Underflow in result #P - Inexact result |
A better summary is the nice table at http://sandpile.org/ia32/except.htm.
The System Developer's Manual contains vast amounts of important information and is required reading for all assembly language programmers. The manual is split into several volumes; links to all volumes are here. Highlights from Volumes 1 and 2:
This is a sorry substitute for Chapter 2 in Volume 1 of the SDM.